[AVR] MCU Control Register

MCU Control Register – MCUCR

 

Bit	7	6	5	4	3	2	1	0
	SRE	SRW10	SE	SM1	SM0	SM2	IVSEL	IVCE
Read/Write	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Initial Value	0	0	0	0	0	0	0	0

 

Bit 7 – SRE: External SRAM/XMEM Enable

Writing SRE to one enables the External Memory Interface.The pin functions AD7:0,

A15:8, ALE, WR, and RD are activated as the alternate pin functions. The SRE bit overrides

any pin direction settings in the respective data direction registers. Writing SRE to

zero, disables the External Memory Interface and the normal pin and data direction settings

are used.

 

Bit 6 – SRW10: Wait-state Select Bit

For a detailed description in non-ATmega103 compatibility mode, see common description

for the SRWn bits below (XMCRA description). In ATmega103 compatibility mode,

writing SRW10 to one enables the wait-state and one extra cycle is added during

read/write strobe as shown in Figure 14.

 

 

[AVR] ATmega64와 ATmega128의 차이

	ATmega64	ATmega128A
Flash (Kbytes)	64	128
EEPROM (Kbytes)	2	4
SRAM (Bytes)	4096	4096
Max I/O Pins	54	53
F.max (MHz)	16	16
Vcc (V)	2.7 – 5.5	2.7 – 5.5
10-bit A/D Channels	8	8
Analog Comparator	Yes	Yes
16-bit Timers	2	2
8-bit Timer	2	2
Brown Out Detector	Yes	Yes
Ext Interrupts	8	8
Hardware Multiplier	Yes	Yes
Interrupts	34	34
ISP	Yes	Yes
On Chip Oscillator	Yes	Yes
PWM Channels	8	8
RTC	Yes	Yes
Self Program Memory	Yes	Yes
SPI	1	1
TWI	Yes	Yes
UART	2	2
Watchdog	Yes	Yes
Pb-Free Packages	MLF (VQFN) 64 TQFP 64	MLF (VQFN) 64 TQFP 64

 

결론적으로는 메모리 차이인거다.

[AVR] Atmega128 Software reset

Software reset이 필요한 경우

 

asm("jmp 0");

 

또는

 

#define WDR asm("WDR")

WDR;

 

이렇게 하면 된다.

 

하드웨어적으로 리셋 시켜주는 편이 더 좋긴 하겠지만...

[AVR] ATmega I/O 레지스터

ATmega128 각 포트는 3개의 I/O레지스터를 사용하여 제어할 수 있도록 구성되어 있다.

 

DDRx(Data Direction Register) : 입출력의 방향 설정 (R/W)

PINx(Port Input Pins Register) : 포트 입력 핀 (Only Read)

PORTx : 데이터 출력 (R/W)

 

보통의 마이컴은 입력과 출력 데이터 레지스터를 구분하지 않는데 AVR의 경우 각각의 레지스터를 가진다.

 

 

* Datasheet 보러가기 : Atmega128L

 

* Datasheet 일부 발췌 (60page..)

Three I/O memory address locations are allocated for each port, one each for the Data

Register – PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The

Port Input Pins I/O location is read only, while the Data Register and the Data Direction

Register are read/write.